Xilinx DDR3学习总结——1、MIG核设置

本文转载自:十年老鸟的CSDN博客

前言
话说之前从来没有使用过DDR,工作中的项目都是流式处理的,没有一个大存储的需求,应该图像处理中DDR用的会比较多一些,但是一个这么常用的东西不预先学习一下也不像话,在这里,也就记录一下学习的过程。参考其他优秀的博主的文章,现学现会。

开发板 DDR信息
开发板手册的介绍信息:
开发板上有4个DDR3颗粒,单片DDR内存大小是512MB,数据接口是16bit,四片DDR3内存共有2GB。内存数据主频高达1600MHZ,数据带宽可达1600MHz*64bit

DDR3型号:MT41K256M16TW-107

根据型号计算:256M*16bit = 512MB,容量没错

多片DDR连接时,地址引脚是完全一致的,不同的是数据位以及对应的数据标志的一些扩展 4片DDR3则DQ变成了64bit。
数据主频高达1600MHz,那么IO时钟(怎么描述呢?)为800MHz,时钟比为4:1,那么用户时钟是200MHz

MIG 设置
下面直接对MIG进行设置,虽然有4片DDR3,但还是从一片开始使用吧



上面这个红色方框要注意,每次重新打开MIG IP的时候,这个值又会变成默认值。这个系统时钟经常使用200MHz,是因为除了这个时钟输入,还需输入一个参考时钟,参考时钟固定为200MHz,如果系统时钟时钟也是200MHz的,那么这两个时钟就可以合并为一个。

熟悉Xilinx IO Delay相关结构的都知道,需要对IO做微小延迟调整的时候,用的时钟就是200MHz

系统时钟使用200MHz的时候,上图的红色方框参考时钟可以与系统时钟是同一个端口

因为我们事先准备好了引脚定义,所以选择FIxed

然后读入UCF文件

NET "ddr3_addr[0]" LOC = "AC11" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[10]" LOC = "AJ11" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[11]" LOC = "AC10" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[12]" LOC = "AD8" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[13]" LOC = "AE11" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[14]" LOC = "AB8" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[1]" LOC = "AD9" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[2]" LOC = "AA10" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[3]" LOC = "AH9" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[4]" LOC = "AC9" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[5]" LOC = "AH10" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[6]" LOC = "AB9" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[7]" LOC = "AG10" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[8]" LOC = "AA8" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_addr[9]" LOC = "AF10" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_ba[0]" LOC = "AJ9" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_ba[1]" LOC = "AE8" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_ba[2]" LOC = "AD11" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_cas_n" LOC = "AE10" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_ck_n[0]" LOC = "AJ14" | IOSTANDARD = DIFF_SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_ck_p[0]" LOC = "AH14" | IOSTANDARD = DIFF_SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_cke[0]" LOC = "AK11" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_cs_n[0]" LOC = "AK9" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_dm[0]" LOC = "AK3" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_dm[1]" LOC = "AC4" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_dq[0]" LOC = "AK1" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[10]" LOC = "AD6" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[11]" LOC = "AC5" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[12]" LOC = "AD3" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[13]" LOC = "AC7" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[14]" LOC = "AE6" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[15]" LOC = "AC2" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[1]" LOC = "AJ3" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[2]" LOC = "AJ1" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[3]" LOC = "AJ4" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[4]" LOC = "AH2" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[5]" LOC = "AH6" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[6]" LOC = "AJ2" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[7]" LOC = "AH5" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[8]" LOC = "AD4" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dq[9]" LOC = "AC1" | IOSTANDARD = SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dqs_n[0]" LOC = "AH1" | IOSTANDARD = DIFF_SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dqs_n[1]" LOC = "AD1" | IOSTANDARD = DIFF_SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dqs_p[0]" LOC = "AG2" | IOSTANDARD = DIFF_SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_dqs_p[1]" LOC = "AD2" | IOSTANDARD = DIFF_SSTL135_T_DCI | VCCAUX_IO = HIGH ;
NET "ddr3_odt[0]" LOC = "AK10" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_ras_n" LOC = "AG9" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_reset_n" LOC = "AB10" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;
NET "ddr3_we_n" LOC = "AE9" | IOSTANDARD = SSTL135 | VCCAUX_IO = HIGH ;

读入之后需要点击验证,验证成功了才能进行下一步。

接下来也就一路下一步,那么也就配置完成了

IP核生成完成之后,直接在IP核上右键,点击生成example,vivado会生成一个参考设计工程,这样我们的第一步就完成了

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